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1
Full custom IC 설계 : Cadence Virtuoso Schematic. Layout. Spectre
Full custom IC 설계 : Cadence Virtuoso Schematic. Layout. Spectre
이병진, 569.47-이'44f | 명진 | 2010 569.47-이'44f,
2
(알기 쉬운) 최신 VLSI 설계 : CMOS부터 SoC까지
(알기 쉬운) 최신 VLSI 설계 : CMOS부터 SoC까지
조준동, 569.47-조76초 | 한빛미디어 | 2010 569.47-조76초,
3
Introduction to computer theory
Introduction to computer theory
Cohen, Daniel I. A., 569.47-C678i | John Wiley & Sons | 1997 569.47-C678i,
4
Silicon VLSI technology : fundamentals, practice and modeling
Silicon VLSI technology : fundamentals, practice and modeling
Plummer , James D., 569.47-P735s | Prentice Hall | 2000 569.47-P735s,
5
Modern VLSI design : a systems approach
Modern VLSI design : a systems approach
Wolf, Wayne, 569.47-W855m | PTR Prentice-Hall | 1994 569.47-W855m,
6
VLSI 93
VLSI 93
Yanagawa, Takayuki, 569.47-Y21v | North-Holland | 1994 569.47-Y21v,
7
Digital signal processing in VLSI
Digital signal processing in VLSI
Higgins, Richard J, 569.47-H636d | Prentice Hall | 1990 569.47-H636d,
8
Vlsi 91
Vlsi 91
Halaas, A, 569.47-H157v | Netherlands | 1992 569.47-H157v,
9
VLSI chip design with the hareware decription language VERILOG and introduction based on a large RISC processor design
VLSI chip design with the hareware decription language VERILOG and introduction based on a large RISC processor design
Golze, Ulruch, 569.47-G629v | Springer-verlag | 1996 569.47-G629v,
10
VLSI array processors
VLSI array processors
Kung, S.Y., 569.47-K96v | Prentice Hall | 1988 569.47-K96v,
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