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1
New Fabrication Technique Using Side-Wall-Type Plasma-Enhanced Chemical-Vapor Deposition for a Floating Gate Memory with a Si Nanodot
New Fabrication Technique Using Side-Wall-Type Plasma-Enhanced Chemical-Vapor Deposition for a Floating Gate Memory with a Si Nanodot
Kazunori Ichikawa., | 한국물리학회 | 2006 ,
2
Analysis of Chemical Bond States and Electrical Properties of Stacked AlON/HfO₂ Gate Oxides Formed by Using a Layer-by-Layer Technique
Analysis of Chemical Bond States and Electrical Properties of Stacked AlON/HfO₂ Gate Oxides Formed by Using a Layer-by-Layer Technique
Wonjoon Choi., | 한국물리학회 | 2006 ,
3
Low Voltage Program/ Erase Characteristics of Si Nanocrystal Memory with Damascene Gate FinFET on Bulk Si Wafer
Low Voltage Program/ Erase Characteristics of Si Nanocrystal Memory with Damascene Gate FinFET on Bulk Si Wafer
Jeong-Dong Choe., | 대한전자공학회 | 2006 ,
4
Researchers at the Gate : Factors Influencing Districts' Right of Entry Decisions
Researchers at the Gate : Factors Influencing Districts' Right of Entry Decisions
Steven A. Melnick., | Corwin Press Inc. | 2006 ,
5
A-High Density 64k-Bit One-Time Programmable ROM Array with 3-Transistor Cell Standard CMOS Gate-Oxide Antifuse
A-High Density 64k-Bit One-Time Programmable ROM Array with 3-Transistor Cell Standard CMOS Gate-Oxide Antifuse
Hyouk-Kyu Cha, Jinbong Kim, Kwyro Lee, | 대한전자공학회 | 2004 ,
6
Trade-off Characteristic between Gate Length Margin and Hot Carrier Lifetime by Considering ESD on NMOSFETs of Submicron Technology
Trade-off Characteristic between Gate Length Margin and Hot Carrier Lifetime by Considering ESD on NMOSFETs of Submicron Technology
Bong-Kyu Joung, | 한국전기전자재료학회 | 2007 ,
7
Fabrication of p-type FinFETs with a 20nm Gate Length using Boron Solid Phase Diffusion Process
Fabrication of p-type FinFETs with a 20nm Gate Length using Boron Solid Phase Diffusion Process
Won Ju Cho, | 대한전자공학회 | 2006 ,
8
Robust Stability Analysis of an Uncertain Nonlinear Networked Control System Gategory
Robust Stability Analysis of an Uncertain Nonlinear Networked Control System Gategory
Minrui Fei, Jun Yi, Huosheng Hu, | The Korean Institute of Electrical Eng. | 2006 ,
9
Significance of Gate Geometry and Injection Speed on the Flow Behavior of Molten Al Alloy During Die Filling
Significance of Gate Geometry and Injection Speed on the Flow Behavior of Molten Al Alloy During Die Filling
Jae-Chul Lee, Hyun Kwang Seok, Hong-Kee Lee, | 대한금속.재료학회 | 2005 ,
10
Studies on Al₂O₃/ZrO₂/Al₂O₃High K Gate Dielectrics Applied in a Fully Depleted SOI MOSFET
Studies on Al₂O₃/ZrO₂/Al₂O₃High K Gate Dielectrics Applied in a Fully Depleted SOI MOSFET
Chenglu Lin, Ninglin Zhang, Qinwo Shen, | 대한금속.재료학회 | 2004 ,
처음12이후마지막
1
Gateways: International Journal of Community Research & Engagement
University of Technology, Sydney [, ]
2
In the House of Delegates
Great Neck Publishing [, ]