본문

  1. Home
10 Results:AA:X WANG PP:INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS 0.562 sec.
RSS 
다국어입력
 상세검색
 신착검색
선택출력 선택엑셀내보내기
1
Cooperative UAV Formation Flying With Obstacle/Collision Avoidance.
Cooperative UAV Formation Flying With Obstacle/Collision Avoidance.
Xiaohua Wang, | Institute of Electrical and Electronics Engineers | 2007 ,
2
Identification of nonlinear systems using generalized kernel models
Identification of nonlinear systems using generalized kernel models
Sheng Chen, | Institute of Electrical and Electronics Engineers | 2005 ,
3
Cooperative control of a magnetically levitated Interferometer: experimental study.
Cooperative control of a magnetically levitated Interferometer: experimental study.
P. K. C. Wang, | Institute of Electrical and Electronics Engineers | 2005 ,
4
Improved control of pneumatic lumber-handling systems
Improved control of pneumatic lumber-handling systems
Xiaochun George Wang, | Institute of Electrical and Electronics Engineers | 2001 ,
5
Multirate Minimum Variance Control Design and Control Performance Assessment : A Data-Driven Subspace Approach
Multirate Minimum Variance Control Design and Control Performance Assessment : A Data-Driven Subspace Approach
Xiaorui Wang, | Institute of Electrical and Electronics Engineers | 2007 ,
6
Discrete-Time Sliding Mode Control With Time-Varying Surface for Hard Disk Drives
Discrete-Time Sliding Mode Control With Time-Varying Surface for Hard Disk Drives
Qinglei Hu, | Institute of Electrical and Electronics Engineers | 2009 ,
7
Nonlinear PCA With the Local Approach for Diesel Engine Fault Detection and Diagnosis
Nonlinear PCA With the Local Approach for Diesel Engine Fault Detection and Diagnosis
Xun Wang, | Institute of Electrical and Electronics Engineers | 2008 ,
8
NARX-Based Nonlinear System Identification Using Orthogonal Least Squares Basis Hunting
NARX-Based Nonlinear System Identification Using Orthogonal Least Squares Basis Hunting
Sheng Chen, | Institute of Electrical and Electronics Engineers | 2008 ,
9
A 90-nm FPGA I/O Buffer Design With 1.6-Gb/s Data Rate for Source-Synchronous System and 300-MHz Clock Rate for External Memory Interface
A 90-nm FPGA I/O Buffer Design With 1.6-Gb/s Data Rate for Source-Synchronous System and 300-MHz Clock Rate for External Memory Interface
Tyhach, J, | Institute of Electrical and Electronics Engineers | 2005 ,
10
Output Tracking Control of a One-Link Flexible Manipulator via Causal Inversion
Output Tracking Control of a One-Link Flexible Manipulator via Causal Inversion
X. Wang., | Institute of Electrical and Electronics Engineers | 2006 ,
처음1마지막