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261
Pinocchio's Pupil: Using Eyetracking and Pupil Dilation to Understand Truth Telling and Deception in Sender-Receiver Games
Pinocchio's Pupil: Using Eyetracking and Pupil Dilation to Understand Truth Telling and Deception in Sender-Receiver Games
Wang, J.T.-y., | American Economic Assn | 2010 ,
262
Financing Development: The Role of Information Costs
Financing Development: The Role of Information Costs
Greenwood, J., | American Economic Assn | 2010 ,
263
Why Do Payment Card Networks Charge Proportional Fees?
Why Do Payment Card Networks Charge Proportional Fees?
Shy, O, | American Economic Assn | 2011 ,
264
신라 불교문화 원형 연구 : -실크로드와 경주를 중심으로-
신라 불교문화 원형 연구 : -실크로드와 경주를 중심으로-
문무왕 ( Mu Wang Mun ), | 한국불교미술사학회 | 2014 ,
265
Caballero Meets Bewley: The Permanent-Income Hypothesis in General Equilibrium
Caballero Meets Bewley: The Permanent-Income Hypothesis in General Equilibrium
Wang, N, | American Economic Assn | 2003 ,
266
반도체 ; CMOS 소자를 위한 NiSi의 Surface Damage 의존성
반도체 ; CMOS 소자를 위한 NiSi의 Surface Damage 의존성
지희환 ( Hee Hwan Ji ), | 한국전기전자재료학회 | 2003 ,
267
Selection of New Breeding Materials with Resistance to Anthracnose in Capsicum annuum
Selection of New Breeding Materials with Resistance to Anthracnose in Capsicum annuum
Do Ham Pae, | 한국원예학회 | 2005 ,
268
전기철도용 견인전동기의 복합가속열화 상태진단에 관한 연구
전기철도용 견인전동기의 복합가속열화 상태진단에 관한 연구
왕종배(Jong Bae Wang), | 한국전기전자재료학회 | 2002 ,
269
A 90-nm FPGA I/O Buffer Design With 1.6-Gb/s Data Rate for Source-Synchronous System and 300-MHz Clock Rate for External Memory Interface
A 90-nm FPGA I/O Buffer Design With 1.6-Gb/s Data Rate for Source-Synchronous System and 300-MHz Clock Rate for External Memory Interface
Tyhach, J, | Institute of Electrical and Electronics Engineers | 2005 ,
270
Modeling and Sizing for Minimum Energy Operation in Subthreshold Circuits
Modeling and Sizing for Minimum Energy Operation in Subthreshold Circuits
Calhoun, B. H, | Institute of Electrical and Electronics Engineers | 2005 ,
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