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441
Hearing Voices: the Impact of Announcer Speech Characteristics on Consumer Response to Broadcast Advertising
Hearing Voices: the Impact of Announcer Speech Characteristics on Consumer Response to Broadcast Advertising
Amitava Chattopadhyay, | Association for Consumer Research | 2002 ,
442
Interpreting Labor Supply Regressions in a Model of Full- and Part-Time Work
Interpreting Labor Supply Regressions in a Model of Full- and Part-Time Work
Yongsung Chang, | American Economic Assn | 2011 ,
443
Sustaining Production Chains through Financial Linkages
Sustaining Production Chains through Financial Linkages
Kim, S.-J., | American Economic Assn | 2012 ,
444
The Impact of Shrouded Fees: Evidence from a Natural Experiment in the Indian Mutual Funds Market
The Impact of Shrouded Fees: Evidence from a Natural Experiment in the Indian Mutual Funds Market
Anagol, S, | American Economic Assn | 2012 ,
445
Global and Local Health Monitoring of Plate-Girder Bridges under Uncertain Temperature Conditions
Global and Local Health Monitoring of Plate-Girder Bridges under Uncertain Temperature Conditions
Jeong Tae Kim, | The Korean Society of Steel Structures | 2006 ,
446
Evaluation of the Retail Service Quality Scale for U.S. and Korean Customers of Discount Stores
Evaluation of the Retail Service Quality Scale for U.S. and Korean Customers of Discount Stores
Kim, S., | Association for Consumer Research | 2001 ,
447
Design and Fabrication of the 0.1 ㎛ Γ-Shaped Gate PHEMT
Design and Fabrication of the 0.1 ㎛ Γ-Shaped Gate PHEMT
Seong Dae Lee, | 한국전자파학회 | 2001 ,
448
Efficient Derivation of Closed-Form Green
Efficient Derivation of Closed-Form Green
Byoung Hee Oh, | 한국전자파학회 | 2001 ,
449
Beyond Happiness and Satisfaction: Toward Well-Being Indices Based on Stated Preference
Beyond Happiness and Satisfaction: Toward Well-Being Indices Based on Stated Preference
Daniel J. Benjamin, | American Economic Assn | 2014 ,
450
A 90-nm FPGA I/O Buffer Design With 1.6-Gb/s Data Rate for Source-Synchronous System and 300-MHz Clock Rate for External Memory Interface
A 90-nm FPGA I/O Buffer Design With 1.6-Gb/s Data Rate for Source-Synchronous System and 300-MHz Clock Rate for External Memory Interface
Tyhach, J, | Institute of Electrical and Electronics Engineers | 2005 ,
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