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A Visual Tradeoff Space for Formal Verification and Validation Techniques
A Visual Tradeoff Space for Formal Verification and Validation Techniques
Detailed Information
- 자료유형
- 기사
- ISSN
- 19328184
- 저자명
- Doron Drusinsky
- 서명/저자
- A Visual Tradeoff Space for Formal Verification and Validation Techniques / Doron Drusinsky , 공저 James Bret Michael, Man-tak Shing
- 발행사항
- New York : INST ELEC & ELEC ENGINEERS, 2008.
- 형태사항
- pp. 513-519
- 주기사항
- 참고문헌수록
- 원문정보
- url
- 모체레코드
- 모체정보확인
- Control Number
- kjul:60259781
MARC
008200729s2008 us aa eng■022 ▼a19328184
■1001 ▼aDoron Drusinsky
■24510▼aA Visual Tradeoff Space for Formal Verification and Validation Techniques▼dDoron Drusinsky▼e공저 James Bret Michael, Man-tak Shing
■260 ▼aNew York▼bINST ELEC & ELEC ENGINEERS▼c2008.
■300 ▼app. 513-519
■500 ▼a참고문헌수록
■7001 ▼aJames Bret Michael, Man-tak Shing
■773 ▼tIEEE Systems Journal▼g2008. December (Vol.2 No.4)▼d2008, 12
■856 ▼uhttps://ieeesystemsjournal.org/
■SIS ▼aS050620▼b60109695▼h8▼s2▼fP
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