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A Surface Potential Model for Predicting Substrate Noise Coupling in Integrated Circuits
A Surface Potential Model for Predicting Substrate Noise Coupling in Integrated Circuits
Detailed Information
- Material Type
- 기사
- ISSN
- 00189200
- Author
- Kristiansson, S
- Title/Author
- A Surface Potential Model for Predicting Substrate Noise Coupling in Integrated Circuits / Kristiansson, S ; 공저 Ingvarson, F. ; Kagganti, S. P. ; Simic, N. ; Zgrda, M. ; Jeppson, K. O.
- Publish Info
- New York : Institute of Electrical and Electronics Engineers, 2005.
- Material Info
- pp. 1797-1803
- General Note
- 참고문헌 수록
- Added Entry-Personal Name
- Ingvarson, F.
- Added Entry-Personal Name
- Kagganti, S. P.
- Added Entry-Personal Name
- Simic, N.
- Added Entry-Personal Name
- Zgrda, M.
- Added Entry-Personal Name
- Jeppson, K. O.
- Electronic Location and Access
- url
- 모체레코드
- 모체정보확인
- Control Number
- kjul:60234031
MARC
008191007s2005 us aa eng■022 ▼a00189200
■1001 ▼aKristiansson, S
■24510▼aA Surface Potential Model for Predicting Substrate Noise Coupling in Integrated Circuits▼dKristiansson, S▼e공저 Ingvarson, F.▼eKagganti, S. P.▼eSimic, N.▼eZgrda, M.▼eJeppson, K. O.
■260 ▼aNew York▼bInstitute of Electrical and Electronics Engineers▼c2005.
■300 ▼app. 1797-1803
■500 ▼a참고문헌 수록
■7001 ▼aIngvarson, F.
■7001 ▼aKagganti, S. P.
■7001 ▼aSimic, N.
■7001 ▼aZgrda, M.
■7001 ▼aJeppson, K. O.
■773 ▼tIEEE journal of solid-state circuits▼gVol.40 No.9 (SEPTEMBER)▼d2005, 09
■856 ▼uhttp://sscs.ieee.org/
■SIS ▼aS074570▼b60229100▼h8▼s2▼fP
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