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Switch-level timing simulation of MOS VLSI circuits
Switch-level timing simulation of MOS VLSI circuits
Detailed Information
- Material Type
- 단행본
- Date and Time of Latest Transaction
- 20010917141159.0
- ISBN
- 0898383021
- Callnumber
- 569.8 R215s
- Author
- Rao, Vasant B.
- Title/Author
- Switch-level timing simulation of MOS VLSI circuits / Vasant B. Rao ; David V. Overhauser ; Timothy N. Trick...[et al.].
- Publish Info
- Boston : Kluwer Academic Publishers, 1989.
- Material Info
- 209 p. : illus ; 23 cm.
- 서지주기
- Includes index.
- Added Entry-Personal Name
- Overhauser, David V.
- Added Entry-Personal Name
- Trick., Timothy N.
- Price Info
- 42000
- Control Number
- kjul:50026661
MARC
008010917s1989 us a 001 eng■005 20010917141159.0
■020 ▼a0898383021
■035 ▼aKRIC00389919
■090 ▼a569.8▼bR215s
■1001 ▼aRao, Vasant B.
■24510▼aSwitch-level timing simulation of MOS VLSI circuits▼dVasant B. Rao▼eDavid V. Overhauser▼eTimothy N. Trick...[et al.].
■260 ▼aBoston▼bKluwer Academic Publishers▼c1989.
■300 ▼a209 p.▼billus▼c23 cm.
■504 ▼aIncludes index.
■7001 ▼aOverhauser, David V.
■7001 ▼aTrick., Timothy N.
■9500 ▼b42000
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