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10-비트 200MS/s CMOS 병렬 파이프라인 아날로그/디지털 변환기의 설계
10-비트 200MS/s CMOS 병렬 파이프라인 아날로그/디지털 변환기의 설계
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MARC
008201012s2004 ulk aa kor■022 ▼a15982831
■1001 ▼a정강민 ( Jeong Gang Min )
■24510▼a10-비트 200MS/s CMOS 병렬 파이프라인 아날로그/디지털 변환기의 설계▼d정강민 ( Jeong Gang Min ) 저
■260 ▼a서울▼b한국정보처리학회▼c2004.
■300 ▼app. 195-202
■500 ▼a참고문헌수록
■773 ▼t정보처리학회논문지 A=The KIPS Transations : Part A▼g제11-A권 제2호 (통권 제86호)(2004년 4월)▼d2004, 04
■856 ▼uhttp://www.kips.or.kr/
■SIS ▼aS015989▼b60058741▼h8▼s2▼fP
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